6-Bit Programmable 2-/3-/4-Phase
Synchronous Buck Controller

ADP3188
FEATURES
Selectable 2-, 3- or 4-phase operation at up to
1 MHz per phase
±9.5 mV worst-case differential sensing error over
temperature
Logic-level PWM outputs for interface to external
high power drivers
Active current balancing between all output phases
Built-in power good/crowbar blanking supports on-the-fly
VID code changes
6-bit digitally programmable 0.8375 V to 1.6 V output
Programmable short-circuit protection with
programmable latch-off delay

APPLICATIONS
Desktop PC power supplies for
Next-generation Intel® processors
VRM modules

GENERAL DESCRIPTION
The ADP3188 is a highly efficient, multiphase, synchronous
buck switching regulator controller optimized for converting a
12 V main supply into the core supply voltage required by high
performance Intel processors. The part uses an internal 6-bit
DAC to read a voltage identification (VID) code directly from
the processor, which is used to set the output voltage between
0.8375 V and 1.6 V. It uses a multimode PWM architecture to
drive the logic-level outputs at a programmable switching
frequency that can be optimized for VR size and efficiency.
The phase relationship of the output signals can be pro-
grammed to provide 2-, 3-, or 4-phase operation, allowing
the construction of up to four complementary buck
switching stages.
The ADP3188 also includes programmable no-load offset and
slope functions to adjust the output voltage as a function of
the load current, so it is always optimally positioned for a system
transient. The ADP3188 also provides accurate and reliable
short-circuit protection, adjustable current limiting, and a
delayed power good output that accommodates on-the-fly
output voltage changes requested by the CPU.
The ADP3188 is specified over the commercial tempera-
ture range of 0°C to 85°C and is available in 28-lead, TSSOP
and QSOP packages.

FUNCTIONAL BLOCK DIAGRAM
04835-001
VCC
GND
ADP3188
EN
DELAY
ILIMIT
PWRGD
RTRAMPADJ
PWM2
FB
PWM3
PWM4
SW1
CSSUM
CSCOMP
SW2
SW3
SW4
CSREF
PWM1
VID4 VID3 VID2 VID1 VID5VID0FBRTN
COMP
DAC+150mV
DAC-250mV
CSREF
EN
CROWBAR CURRENT
LIMIT
RESET
RESET
RESET
RESET
2-/3-/4-PHASE
DRIVER LOGIC
ENSET
CURRENT
BALANCING
CIRCUIT
OSCILLATOR
DELAY
UVLO
SHUTDOWN
AND BIAS
CURRENT
LIMIT
CIRCUIT
SOFT
START
PRECISION
REFERENCE
VID
DAC
CMP
CMP
CMP
CMP
28 1314
26
8
25
24
23
17
18
22
21
20
16
27
1 2 3 4 657
19
11
12
15
10
9

Figure 1.
Rev. A
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