12-Bit CCD Signal Processor with
Precision Timing
TM
Generator

AD9994


Rev. Sp0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
FEATURES
10-phase or 12-phase vertical transfer clocking
Supports 4-field and 5-field CCD readout
Correlated double sampler (CDS)
6 dB to 42 dB 10-bit variable gain amplifier (VGA)
12-bit 36 MHz A/D converter
Black level clamp with variable level control
Complete on-chip timing generator
Precision Timing core with < 600 ps resolution
On-chip 3 V horizontal and RG drivers
2-phase and 4-phase H-clock modes
Electronic and mechanical shutter support
On-chip driver for external crystal
On-chip sync generator with external sync input
64-lead LFCSP package (9 mm × 9 mm, 0.5 mm pitch)

APPLICATION
Digital still cameras

GENERAL DESCRIPTION
The AD9994 is a highly integrated CCD signal processor for
digital still camera applications. It includes a complete analog
front end with A/D conversion, combined with a full-function
programmable timing generator. The timing generator is capable
of up to 12-phase vertical clocking to support advanced CCDs
with 4-field and 5-field readout. A Precision Timing core allows
adjustment of high speed clocks with approximately 600 ps
resolution at 36 MHz operation.
The AD9994 is specified at pixel rates of up to 36 MHz. The
analog front end includes black level clamping, CDS, VGA, and
a 12-bit A/D converter. The timing generator provides all the
necessary CCD clocks: RG, H-clocks, V-clocks, sensor gate
pulses, substrate clock, and substrate bias control. Operation is
programmed using a 3-wire serial interface.
Packaged in a 64-lead LFCSP, the AD9994 is specified over an
operating temperature range of –25°C to +85°C.
For more information about the AD9994, email Analog Devices
at afe.ccd@analog.com.

FUNCTIONAL BLOCK DIAGRAM
AD9994
CDS VGA
CLAMP
12-BIT
ADC
DCLK
MSHUT
STROBE
CLI
DOUT
VREF
6dB TO 42dB
HORIZONTAL
DRIVERS
VERTICAL
TIMING
CONTROL
RG
H1 TO H4
10 OR 12
8 OR 6
REFT REFB
PRECISION
TIMING
GENERATOR
SYNC
GENERATOR
INTERNAL CLOCKS
HD VD SYNC
INTERNAL
REGISTERS
CCDIN
–3dB, 0dB, +3dB, +6dB
04972-0-001
12
HL
CLOVSUB VSUB
V1 TO V10
(V1 TO V12)
VSG1 TO VSG8
(VSG1 TO VSG6)
4
SL SCK DATA

Figure 1.