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厂商索引:A-B-C-D-E-F-G-H-I-J-K-L-M-N-O-P-Q-R-S-T-U-V-W-X-Y-Z

74ALVC164245ZQLR

器件描述:16-BIT 2.5-V 3.3-V 3.3V TO 5-V LEVEL-SHIFTING TRANSCEIVER
器件厂商:TI [Texas Instruments]
厂商主页:http://www.ti.com/
文件大小:328.88KB,共15页
Sponsor by e络盟
器件资料摘要:
C0083C0078C0055C0052C0065C0076C0086C0067C0049C0054C0052C0050C0052C0053
C0049C0054C0262C0066C0073C0084 C0050C0046C0053C0262C0086 C0084C0079 C0051C0046C0051C0262C0086C0047C0051C0046C0051C0262C0086 C0084C0079 C0053C0262C0086 C0076C0069C0086C0069C0076C0262C0083C0072C0073C0070C0084C0073C0078C0071 C0084C0082C0065C0078C0083C0067C0069C0073C0086C0069C0082
C0087C0073C0084C0072 C0051C0262C0083C0084C0065C0084C0069 C0079C0085C0084C0080C0085C0084C0083
SCAS416L − MARCH 1994 − REVISED FEBRUARY 2004
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 Member of the Texas Instruments
Widebus Family
C0068 Max t
pd
of 5.8 ns at 3.3 V
C0068 ±24-mA Output Drive at 3.3 V
C0068 Latch-Up Performance Exceeds 250 mA Per
JESD 17
description/ordering information
This 16-bit (dual-octal) noninverting bus
transceiver contains two separate supply rails.
B port has V
CCB
, which is set to operate at 3.3 V
and 5 V. A port has V
CCA
, which is set to operate
at 2.5 V and 3.3 V. This allows for translation from
a 2.5-V to a 3.3-V environment, and vice versa, or
from a 3.3-V to a 5-V environment, and vice versa.
The SN74ALVC164245 is designed for
asynchronous communication between data
buses.
To ensure the high-impedance state during power
up or power down, the output-enable (OE) input
should be tied to V
CC
through a pullup resistor; the
minimum value of the resistor is determined by the
current-sinking capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE

ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP − DL
Tube of 25 SN74ALVC164245DL
ALVC164245
Reel of 1000 SN74ALVC164245DLR
−40°C to 85°C TSSOP − DGG
Reel of 2000 SN74ALVC164245DGGR
ALVC164245
Reel of 250 SN74ALVC164245DGGT
VFBGA − GQL
Reel of 1000
SN74ALVC164245KR
VC4245
VFBGA − ZQL (Pb-free) 74ALVC164245ZQLR

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OPERATION
OE DIR
L L B data to A bus
L H A data to B bus
H X Isolation
Copyright  2004, Texas Instruments IncorporatedC0080C0082C0079C0068C0085C0067C0084C0073C0079C0078 C0068C0065C0084C0065 C0105C0110C0102C0111C0114C0109C0097C0116C0105C0111C0110 C0105C0115 C0099C0117C0114C0114C0101C0110C0116 C0097C0115 C0111C0102 C0112C0117C0098C0108C0105C0099C0097C0116C0105C0111C0110 C0100C0097C0116C0101C0046
C0080C0114C0111C0100C0117C0099C0116C0115 C0099C0111C0110C0102C0111C0114C0109 C0116C0111 C0115C0112C0101C0099C0105C0102C0105C0099C0097C0116C0105C0111C0110C0115 C0112C0101C0114 C0116C0104C0101 C0116C0101C0114C0109C0115 C0111C0102 C0084C0101C0120C0097C0115 C0073C0110C0115C0116C0114C0117C0109C0101C0110C0116C0115
C0115C0116C0097C0110C0100C0097C0114C0100 C0119C0097C0114C0114C0097C0110C0116C0121C0046 C0080C0114C0111C0100C0117C0099C0116C0105C0111C0110 C0112C0114C0111C0099C0101C0115C0115C0105C0110C0103 C0100C0111C0101C0115 C0110C0111C0116 C0110C0101C0099C0101C0115C0115C0097C0114C0105C0108C0121 C0105C0110C0099C0108C0117C0100C0101
C0116C0101C0115C0116C0105C0110C0103 C0111C0102 C0097C0108C0108 C0112C0097C0114C0097C0109C0101C0116C0101C0114C0115C0046
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
(3.3 V, 5 V) V
CCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
(3.3 V, 5 V) V
CCB
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
V
CCA
(2.5 V, 3.3 V)
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CCA
(2.5 V, 3.3 V)
2A5
2A6
GND
2A7
2A8
2OE