Linear Integrated Systems
Linear Integrated Systems 4042 Clipper Ct., Fremont, CA 94538 TEL: (510) 490-9160 • FAX: (510) 353-0261
FEATURES
VERY HIGH INPUT IMPEDANCE
HIGH GATE BREAKDOWN
ULTRA LOW LEAKAGE
LOW CAPACITANCE
ABSOLUTE MAXIMUM RATINGS (NOTE 1)
(T
A
= 25°C unless otherwise noted)
Drain-Source or Drain-Gate Voltage (NOTE 2)
3N165 40 V
3N166 30 V
Transient G-S Voltage (NOTE 3) ±125 V
Gate-Gate Voltage ±80 V
Drain Current (NOTE 2) 50 mA
Storage Temperature -65°C to +200°C
Operating Temperature -55°C to +150°C
Lead Temperature (Soldering, 10 sec.) +300°C
Power Dissipation (One Side) 300 mW
Total Derating above 25°C 4.2 mW/°C
MONOLITHIC DUAL P-CHANNEL
ENHANCEMENT MODE MOSFET
3N165, 3N166
TO-99
Bottom View
Device Schematic
S
D1
G1
C
G2
D2
1 7
5
48
3
LIMITS
SYMBOL CHARACTERISTICS MIN. MAX. UNITS CONDITIONS
I
GSSR
Gate Reverse Leakage Current -- 10 V
GS
= 40 V
I
GSSF
Gate Forward Leakage Current -- -10 V
GS
= -40 V
-- -25 pA T
A
=+125°C
I
DSS
Drain to Source Leakage Current -- -200 V
DS
= -20 V
I
SDS
Source to Drain Leakage Current -- -400 V
SD
= -20 V V
DB
= 0
I
D(on)
On Drain Current -5 -30 mA V
DS
= -15 V V
GS
= -10 V
V
GS(th)
Gate Source Threshold Voltage -2 -5 V V
DS
= -15 V I
D
= -10 µA
V
GS(th)
Gate Source Threshold Voltage -2 -5 V V
DS
= V
GS
I
D
= -10 µA
r
DS(on)
Drain Source ON Resistance -- 300 ohms V
GS
= -20 V I
D
= -100 µA
g
fs
Forward Transconductance 1500 3000 µsV
DS
= -15V I
D
= -10mA f=1kHz
g
os
Output Admittance -- 300 µs
C
iss
Input Capacitance -- 3.0
C
rss
Reverse Transfer Capacitance -- 0.7 pF V
DS
= -15V I
D
= -10mA f=1MHz
C
oss
Output Capacitance -- 3.0 (NOTE 4)
R
E
(Y
fs
) Common Source Forward Transconductance 1200 -- µsV
DS
= -15V I
D
= -10mA f=100MHz
(NOTE 4)
ELECTRICAL CHARACTERISTICS (T
A
=25°C and V
BS
=0 unless otherwise specified)