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AM26LS31PC

器件描述:Quad Line Driver with NAND Enabled Three-State Outputs
器件厂商:MOTOROLA [Motorola, Inc]
文件大小:77.19KB,共4页
Sponsor by e络盟
器件资料摘要:
C0065C0077C0050C0054C0076C0083C0051C0049
SEMICONDUCTOR
TECHNICAL DATA
QUAD EIA–422 LINE DRIVER
WITH THREE–STATE OUTPUTS
PIN CONNECTIONS
Order this document by AM26LS31/D
PC SUFFIX
PLASTIC PACKAGE
CASE 648
D SUFFIX
PLASTIC PACKAGE
CASE 751B
(SO–16)
Device
Operating
Temperature Range Package
ORDERING INFORMATION
AM26LS31PC
MC26LS31D*
T
A
= 0 to +70°C
Plastic DIP
SO–16
11
10
Outputs C
9
6
5
Outputs D
13
14
Outputs A
3
2
8
7
4
1
12
15
Outputs B
Enable
V
CC
Input C
Input D
Input A
16
Enable
Input B
Gnd
1
MOTOROLA ANALOG IC DEVICE DATA
C0081C0117C0097C0100 C0076C0105C0110C0101 C0068C0114C0105C0118C0101C0114 C0119C0105C0116C0104 C0078C0065C0078C0068
C0069C0110C0097C0098C0108C0101C0100 C0084C0104C0114C0101C0101C0045C0083C0116C0097C0116C0101 C0079C0117C0116C0112C0117C0116C0115
The Motorola AM26LS31 is a quad differential line driver intended for
digital data transmission over balanced lines. It meets all the requirements of
EIA–422 Standard and Federal Standard 1020.
The AM26LS31 provides an enable/disable function common to all four
drivers as opposed to the split enables on the MC3487 EIA–422 driver.
The high impedance output state is assured during power down.
• Full EIA–422 Standard Compliance
• Single +5.0 V Supply
• Meets Full V
O
= 6.0 V, V
CC
= 0 V, I
O
C0116 100 µA Requirement
• Output Short Circuit Protection
• Complementary Outputs for Balanced Line Operation
• High Output Drive Capability
• Advanced LS Processing
• PNP Inputs for MOS Compatibility
Representative Block Diagrams
Enable
Enable
Input
Non–Inverting
Outputs
Inverting
Output
Controls
TRUTH TABLE
Input
Control
lnputs
(E/E)
Non–Inverting
Output
Inverting
Output
H
L
X
H/L
H/L
L/H
H
L
Z
L
H
Z
* Note that the surface mount MC26LS31D device uses the same die as in the plastic DIP
* AM26LS31DC device, but with an MC prefix to prevent confusion with the package suffix.  Motorola, Inc. 1995
L = Low Logic State
H = High Logic State
X = Irrelevant
Z = Third–State (High Impedance)