1. General description
The 74LVC1G3157 is a high-performance, low-power, low-voltage, Si-gate CMOS device
that provides superior performance to most advanced CMOS compatible TTL families.
The 74LVC1G3157 provides one analog multiplexer/demultiplexer with one digital select
input (S), two independent inputs/outputs (B1 and B2) and a common input/output (A).
2. Features
a73 Wide supply voltage range from 1.65 V to 5.5 V
a73 Very low ON-resistance:
a78 7.5 Ω (typical) at V
CC
= 2.7 V
a78 6.5 Ω (typical) at V
CC
= 3.3 V
a78 6 Ω (typical) at V
CC
=5V
a73 Break-before-make switching
a73 High noise immunity
a73 ESD protection:
a78 HBM EIA/JESD22-A114-B exceeds 2000 V
a78 MM EIA/JESD22-A115-A exceeds 200 V
a73 CMOS low-power consumption
a73 Latch-up performance meets requirements of JESD 78 Class I
a73 Direct interface with TTL levels
a73 Control input accepts voltages up to 5 V
a73 Multiple package options
a73 Specified from −40 °C to +85 °C and from −40 °C to +125 °C
3. Quick reference data
74LVC1G3157
2-channel analog multiplexer/demultiplexer
Rev. 01 — 7 February 2005 Product data sheet
Table 1: Quick reference data
GND = 0 V; t
r
=t
f
≤ 2.5 ns; minimum and maximum values at T
amb
= −40 °C to +85 °C; typical
values at T
amb
=25°C.
Symbol Parameter Conditions Min Typ Max Unit
t
PZH
, t
PZL
turn-on time S to Bn C
L
= 50 pF; R
L
= 500 Ω
V
CC
= 3.3 V 0.5 4.0 5.5 ns
V
CC
= 5.0 V 0.5 3.0 4.0 ns
t
PHZ
, t
PLZ
turn-off time S to Bn C
L
= 50 pF; R
L
= 500 Ω
V
CC
= 3.3 V 0.5 3.6 4.5 ns
V
CC
= 5.0 V 0.8 2.9 3.5 ns