BS62LV2016SI
器件描述：Very Low Power/Voltage CMOS SRAM 256K X 8 bit
器件厂商：BSI [Brilliance Semiconductor]
文件大小：318.92KB，共9页
Sponsor by e络盟器件资料摘要：
R0201-BS62LV2009 Revision 1.1
Jan. 2004
1
A17
Very Low Power/Voltage CMOS SRAM
256K X 8 bit
• Vcc operation voltage : 2.4V ~ 3.6V
• Very low power consumption :
Vcc = 3.0V C-grade: 22mA (@55ns) operating current
I -grade: 23mA (@55ns) operating current
C-grade: 17mA (@70ns) operating current
I -grade: 18mA (@70ns) operating current
0.3uA(Typ.) CMOS standby current
• High speed access time :
-55 55ns
-70 70ns
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE2, CE1, and OE options
The BS62LV2009 is a high performance, very low power CMOS
Static Random Access Memory organized as 262,144 words by 8 bits
and operates from a range of 2.4V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.3uA at 3.0V/25
o
C and maximum access time of 55ns at 3.0V/85
o
C.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
The BS62LV2009 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV2009 is available in DICE form, JEDEC standard 32 pin
450mil Plastic SOP, 8mmx13.4mm STSOP and 8mmx20mm TSOP.
DESCRIPTION FEATURES
BLOCK DIAGRAM
PRODUCT FAMILY
PIN CONFIGURATIONS
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.
Address
Input
Buffer
Row
Decoder
Memory Array
1024 x 2048
Column I/O
Write Driver
Sense Amp
Column Decoder
Data
Buffer
Output
Address Input Buffer
A8 A3 A2 A1 A10
Data
Buffer
Input
Control
Gnd
Vdd
OE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
A16
A5
A4
A6
A7
A15
A13
8
8
8
8
16
256
2048
1024
20
A14
A12
A9
BS62LV2009
A11 A0
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
A3
A11
A9
A8
A13
WE
CE2
A15
VCC
A17
A16
A14
A12
A7
A6
A5
A4
•
BS62LV2009TC
BS62LV2009STC
BS62LV2009TI
BS62LV2009STI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
WE
CE1
CE2
BSI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
•
BS62LV2009SC
BS62LV2009SI
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
POWER DISSIPATION
SPEED
( ns )
STANDBY
( ICCSB1, Max )
Operating
( ICC, Max )
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc
RANGE
Vcc=3.0V Vcc=3.0V
PKG TYPE
BS62LV2009DC DICE
BS62LV2009TC TSOP-32
BS62LV2009STC STSOP-32
BS62LV2009SC
+0
O
C to +70
O
C 2.4V ~3.6V 55/70 3uA 17mA
SOP-32
BS62LV2009DI DICE
BS62LV2009TI TSOP-32
BS62LV2009STI STSOP-32
BS62LV2016SI
-40
O
C to +85
O
C 2.4V ~ 3.6V 55/70 5uA
18mA
SOP-32
55ns 70ns
22mA
23mA
55ns: 3.0~3.6V
70ns: 2.7~3.6V
Jan. 2004
1
A17
Very Low Power/Voltage CMOS SRAM
256K X 8 bit
• Vcc operation voltage : 2.4V ~ 3.6V
• Very low power consumption :
Vcc = 3.0V C-grade: 22mA (@55ns) operating current
I -grade: 23mA (@55ns) operating current
C-grade: 17mA (@70ns) operating current
I -grade: 18mA (@70ns) operating current
0.3uA(Typ.) CMOS standby current
• High speed access time :
-55 55ns
-70 70ns
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE2, CE1, and OE options
The BS62LV2009 is a high performance, very low power CMOS
Static Random Access Memory organized as 262,144 words by 8 bits
and operates from a range of 2.4V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.3uA at 3.0V/25
o
C and maximum access time of 55ns at 3.0V/85
o
C.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
The BS62LV2009 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV2009 is available in DICE form, JEDEC standard 32 pin
450mil Plastic SOP, 8mmx13.4mm STSOP and 8mmx20mm TSOP.
DESCRIPTION FEATURES
BLOCK DIAGRAM
PRODUCT FAMILY
PIN CONFIGURATIONS
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.
Address
Input
Buffer
Row
Decoder
Memory Array
1024 x 2048
Column I/O
Write Driver
Sense Amp
Column Decoder
Data
Buffer
Output
Address Input Buffer
A8 A3 A2 A1 A10
Data
Buffer
Input
Control
Gnd
Vdd
OE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
A16
A5
A4
A6
A7
A15
A13
8
8
8
8
16
256
2048
1024
20
A14
A12
A9
BS62LV2009
A11 A0
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
A3
A11
A9
A8
A13
WE
CE2
A15
VCC
A17
A16
A14
A12
A7
A6
A5
A4
•
BS62LV2009TC
BS62LV2009STC
BS62LV2009TI
BS62LV2009STI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
WE
CE1
CE2
BSI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
•
BS62LV2009SC
BS62LV2009SI
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
POWER DISSIPATION
SPEED
( ns )
STANDBY
( ICCSB1, Max )
Operating
( ICC, Max )
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc
RANGE
Vcc=3.0V Vcc=3.0V
PKG TYPE
BS62LV2009DC DICE
BS62LV2009TC TSOP-32
BS62LV2009STC STSOP-32
BS62LV2009SC
+0
O
C to +70
O
C 2.4V ~3.6V 55/70 3uA 17mA
SOP-32
BS62LV2009DI DICE
BS62LV2009TI TSOP-32
BS62LV2009STI STSOP-32
BS62LV2016SI
-40
O
C to +85
O
C 2.4V ~ 3.6V 55/70 5uA
18mA
SOP-32
55ns 70ns
22mA
23mA
55ns: 3.0~3.6V
70ns: 2.7~3.6V