AZ100ELT23
器件描述:Dual Differential PECL to CMOS/TTL Translator
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器件资料摘要:
AZ100ELT23
Dual Differential PECL to CMOS/TTL Translator
1630 S. STAPLEY DR., SUITE 125 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541
www.azmicrotek.com
ARIZONA MICROTEK, INC.
FEATURES
• Green / RoHS Compliant /
Lead (Pb) Free package available
• 3.5ns Typical Propagation Delay
• <500ps Typical Output to Output Skew
• Differential PECL Inputs
• CMOS/TTL Outputs
• Flow Through Pinouts
• Direct Replacement for ON
Semiconductor MC100ELT23
• Operating Range of 3.0V to 5.5V (For
operation down to 2.5V consult AZM)
• Use AZ100ELT23 for 10K Applications
DESCRIPTION
The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels
are used, only V
CC
and ground are required. The small outline 8-lead packaging and the low skew, dual gate design
of the ELT23 makes it ideal for applications that require the translation of a clock and a data signal.
The ELT23 is available in only the ECL 100K standard. Since there are no PECL outputs or an external V
BB
reference, the ELT23 does not require both ECL standard versions. The PECL inputs are differential; there is no
specified difference between the differential input 10K and 100K standards. Therefore the AZ100ELT23 can accept
any standard differential PECL input referenced from a V
CC
of 3.0V to 5.5V.
NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
PACKAGE AVAILABILITY
PACKAGE PART NUMBER MARKING NOTES
SOIC 8 AZ100ELT23D
AZM100
ELT23
1,2
SOIC 8 RoHS
Compliant / Lead
(Pb) Free
AZ100ELT23D+
AZM100+
ELT23
1,2
SOIC 8 Green /
RoHS Compliant /
Lead (Pb) Free
AZ100ELT23DG
AZM100G
ELT23
1,2,3
TSSOP 8 AZ100ELT23T
AZH
T23
1,2
1 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K
parts) Tape & Reel.
2 Date code format: “Y” or “YY” for year followed by “WW” for week on
underside of part.
3 The Green package mold compound is halogen free. The leads are plated
with 100% matte tin (Sn), eliminating lead (Pb). The Green package is
also RoHS compliant / Lead (Pb) Free.
PIN DESCRIPTION
PIN FUNCTION
Q0, Q1 CMOS/TTL Outputs
DO, D0¯ ¯ – D1, D1¯ ¯ Differential PECL inputs
V
CC
Positive Supply
GND Ground
8
5
6
7
4
3
2
1
V
CC
Q0
GND
D0
D0
D1
D1 Q1
PECL CMOS/TTL