FPGA
Configuration
EEPROM
Memory
2-megabit
AT17C002
AT17LV002
Rev. 2281D–12/01
Features
• EE Reprogrammable 2,097,152 x 1-bit Serial Memories Designed to Store
Configuration Programs for Field Programmable Gate Arrays (FPGAs)
In-System Programmable via 2-wire Bus
Simple Interface to SRAM FPGAs
Compatible with Atmel AT6000, AT40K and AT94K Devices, Altera FLEX
®
, APEX
™

Devices, Lucent ORCA
®
FPGAs, Xilinx XC3000
™
, XC4000
™
, XC5200
™
, Spartan
®
,
Virtex
™
FPGAs
Cascadable Read Back to Support Additional Configurators or Higher-density Arrays
Low-power CMOS EEPROM Process
Programmable Reset Polarity
Available in 6 mm x 6 mm x 1 mm 8-lead LAP (Pin-compatible with 8-lead SOIC/VOIC
Packages), 20-lead PLCC, 44-lead PLCC and 44-lead TQFP Packages (Pin-compatible
Across Product Family)
Emulation of Atmel’s AT24CXXX Serial EEPROMs
Available in 3.3V ± 10% LV and 5V ± 5% C Versions
System-friendly READY Pin
Low-power Standby Mode
Replacement for AT17C/LV020
Description
The AT17C002 and AT17LV002 (high-density AT17 Series) FPGA Configuration
EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration mem-
ory for programming Field Programmable Gate Arrays. The AT17 Series is packaged
in the popular 8-lead LAP, 20-lead PLCC, 44-lead PLCC and the 44-lead TQFP. The
AT17 Series family uses a simple serial-access procedure to configure one or more
FPGA devices. The user can select the polarity of the reset function by programming
four EEPROM bytes. These devices support a write protection mode and a system-
friendly READY pin, which signifies a “good” power level to the FPGA and can be used
to ensure reliable system power-up.
The AT17 Series Configurators can be programmed with industry-standard program-
mers, Atmel’s ATDH2200E Programming System and Atmel’s ATDH2225 ISP Cable.
1