AM27C2048-120DC
器件描述:2 Megabit (128 K x 16-Bit) CMOS EPROM
文件大小:173.55KB,共12页
Sponsor by e络盟
器件资料摘要:
11407G-1
A0–A16
Address
Inputs
Y
Gating
2,097,152
Bit Cell
Matrix
X
Decoder
Y
Decoder
FINAL
Am27C2048
2 Megabit (128 K x 16-Bit) CMOS EPROM
DISTINCTIVE CHARACTERISTICS
a73 Fast access time
— Speed options as fast as 55 ns
a73 Low power consumption
— 100 µA maximum CMOS standby current
a73 JEDEC-approved pinout
— Plug-in upgrade of 1 Mbit EPROM
— 40-pin DIP/PDIP
— 44-pin PLCC
a73 Single +5 V power supply
a73 ±10% power supply tolerance standard
a73 100% Flashrite programming
— Typical programming time of 16 seconds
a73 Latch-up protected to 100 mA from –1 V to
V
CC
+ 1 V
a73 Versatile features for simple interfacing
— Both CMOS and TTL input/output compatibility
— Two line control functions
a73 High noise immunity
GENERAL DESCRIPTION
The Am27C2048 is a 2 Mbit, ultraviolet erasable pro-
grammable read-only memory. It is organized as 128 K
words, operates from a single +5 V supply, has a static
standby mode, and features fast single address loca-
tion programming. The Am27C2048 is ideal for use in
16-bit microprocessor systems. The device is available
in windowed ceramic DIP packages, and plastic one
time programmable (OTP) PDIP and PLCC packages.
Data can be typically accessed in less than 55 ns, al-
lowing high-performance microprocessors to operate
without any WAIT states. The device offers separate
Output Enable (OE#) and Chip Enable (CE#) controls,
thus eliminating bus contention in a multiple bus micro-
processor system.
AMD’s CMOS process technology provides high
speed, low power, and high noise immunity. Typical
power consumption is only 125 mW in active mode,
and 100 µW in standby mode.
All signals are TTL levels, including programming sig-
nals. Bit locations may be programmed singly, in
blocks, or at random. The device supports AMD’s
Flashrite programming algorithm (100 µs pulses), re-
sulting in a typical programming time of 16 seconds.
BLOCK DIAGRAM
PGM#
CE#
OE#
V
CC
V
SS
V
PP
Data Outputs
DQ0–DQ15
Output
Buffers
Output Enable
Chip Enable
and
Prog Logic
Publication# 11407 Rev: G Amendment/0
Issue Date: May 1998