14971G-1
A0–A18
Address
Inputs 4,194,304-Bit
Cell Matrix
X
Decoder
FINAL
Am27C040
4 Megabit (512 K x 8-Bit) CMOS EPROM
DISTINCTIVE CHARACTERISTICS
a73 Fast access time
— Available in speed options as fast as 90 ns
a73 Low power consumption
— <10 µA typical CMOS standby current
a73 JEDEC-approved pinout
— Plug-in upgrade for 1 Mbit and 2 Mbit EPROMs
— Easy upgrade from 28-pin JEDEC EPROMs
a73 Single +5 V power supply
a73 ±10% power supply tolerance standard
a73 100% Flashrite™ programming
— Typical programming time of 1 minute
a73 Latch-up protected to 100 mA from –1 V to
V
CC
+ 1 V
a73 High noise immunity
a73 Compact 32-pin DIP, PDIP, PLCC packages
GENERAL DESCRIPTION
The Am27C040 is a 4 Mbit ultraviolet erasable pro-
grammable read-only memory. It is organized as 512K
bytes, operates from a single +5 V supply, has a static
standby mode, and features fast single address loca-
tion programming. The device is available in windowed
ceramic DIP packages and plastic one-time program-
mable (OTP) packages.
Data can be typically accessed in less than 90 ns, al-
lowing high-performance microprocessors to operate
without any WAIT states. The device offers separate
Output Enable (OE#) and Chip Enable (CE#) controls,
thus eliminating bus contention in a multiple bus micro-
processor system.
AMD’s CMOS process technology provides high
speed, low power, and high noise immunity. Typical
power consumption is only 100 mW in active mode,
and 50 µW in standby mode.
All signals are TTL levels, including programming sig-
nals. Bit locations may be programmed singly, in
blocks, or at random. The device supports AMD’s
Flashrite programming algorithm (100 µs pulses) re-
sulting in typical programming time of 1 minute.
BLOCK DIAGRAM
CE#/PGM#
OE#
V
CC
V
SS
V
PP
Data Outputs
DQ0–DQ7
Output
Buffers
Y
Gating
Y
Decoder
Output Enable
Chip Enable
and
Prog Logic
Publication# 14971 Rev: G Amendment/0
Issue Date: May 1998