© 2005 Fairchild Semiconductor Corporation DS500291 www.fairchildsemi.com
September 1999
Revised April 2005
7
4
L
VX54
1

Low V
o
l
t
age Oct
a
l Buff
er/
L
i
ne
Dri
ver

wit
h
3-ST
A
T
E
Out
put
s
74LVX541
Low Voltage Octal Buffer/Line Driver with
3-STATE Outputs
General Description
The LVX541 is an octal non-inverting buffer and line driver
designed to be employed as a memory address driver,
clock driver and bus oriented transmitter or receiver which
provides improved PC board density. The inputs tolerate up
to 7V allowing interface of 5V systems to 3V systems.
Features
a73 Input voltage translation from 5V to 3V
a73 Ideal for low power/low noise 3.3V applications
a73 Guaranteed simultaneous switching noise level and
dynamic threshold performance

Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram Logic Symbol
IEEE/IEC
Pin Descriptions Truth Table
H c32 HIGH Voltage Level X c32 Immaterial
L c32 LOW Voltage Level Z c32 High Impedance
Order Number Package Number Package Description
74LVX541M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVX541SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX541MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Descriptions
OE
1
, OE
2
3-STATE Output Enable Inputs
I
0
- I
7
Inputs
O
0
- O
7
3-STATE Outputs
Inputs
Outputs
OE
1
OE
2
I
LLHH
HXXZ
XHX
LLLL