1. General description
The 74ALVC164245 is a high-performance, low-power, low-voltage, Si-gate CMOS
device, superior to most advanced CMOS compatible TTL families.
The 74ALVC164245 is a 16-bit (dual octal) dual supply translating transceiver featuring
non-inverting 3-state bus compatible outputs in both send and receive directions. It is
designed to interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply
environment.
This device can be used as two 8-bit transceivers or one 16-bit transceiver.
The direction control inputs (1DIR and 2DIR) determine the direction of the data flow.
nDIR (active HIGH) enables data from nA ports to nB ports. nDIR (active LOW) enables
data from nB ports to nA ports. The output enable inputs (1OE and 2OE), when HIGH,
disable both nA and nB ports by placing them in a high-impedance OFF-state. The nB
ports interface with the 5 V bus. The nA ports interface with the 3 V bus.
In suspend mode, when one of the supply voltages is zero, there will be no current flow
from the non-zero supply towards the zero supply. The A-outputs must be set 3-state and
the voltage on the A-bus must be smaller than V
diode
(typical 0.7 V). V
CCB
≥ V
CCA
(except
in suspend mode).
2. Features
a73 5 V tolerant inputs/outputs for interfacing with 5 V logic
a73 Wide supply voltage range:
a78 3 V port (V
CCA
): 1.5 V to 3.6 V
a78 5 V port (V
CCB
): 1.5 V to 5.5 V.
a73 CMOS low power consumption
a73 Direct interface with TTL levels
a73 Control inputs voltage range from 2.7 V to 5.5 V
a73 Inputs accept voltages up to 5.5 V
a73 High-impedance outputs when V
CCA
or V
CCB
= 0 V
a73 Complies with JEDEC standard JESD8-B/JESD36
a73 ESD protection:
a78 HBM EIA/JESD22-A114-B exceeds 2000 V
a78 MM EIA/JESD22-A115-A exceeds 200 V.
a73 Specified from −40 °C to +85 °C and −40 °C to +125 °C.
74ALVC164245
16-bit dual supply translating transciever; 3-state
Rev. 02 — 1 June 2004 Product data sheet