64-megabit
(4M x 16)
Burst/Page
Mode 1.8-volt
Flash Memory
AT49SN6416
AT49SN6416T
3464C–FLASH–2/05
Features
• 1.65V - 1.95V Read/Write
High Performance
– Random Access Time – 70 ns
– Page Mode Read Time – 20 ns
– Synchronous Burst Frequency – 66 MHz
– Configurable Burst Operation
Sector Erase Architecture
– Eight 4K Word Sectors with Individual Write Lockout
– One Hundred Twenty-seven 32K Word Main Sectors with Individual Write Lockout
Typical Sector Erase Time: 32K Word Sectors – 700 ms; 4K Word Sectors – 200 ms
Four Plane Organization, Permitting Concurrent Read in Any of the Three Planes not
Being Programmed/Erased
– Memory Plane A: 25% of Memory Including Eight 4K Word Sectors
– Memory Plane B: 25% of Memory Consisting of 32K Word Sectors
– Memory Plane C: 25% of Memory Consisting of 32K Word Sectors
– Memory Plane D: 25% of Memory Consisting of 32K Word Sectors
Suspend/Resume Feature for Erase and Program
– Supports Reading and Programming Data from Any Sector by Suspending Erase
of a Different Sector
– Supports Reading Any Word by Suspending Programming of Any Other Word
Low-power Operation
–30 mA Active
– 35 µA Standby
VPP Pin for Write Protection and Accelerated Program Operations
RESET Input for Device Initialization
CBGA Package
Top or Bottom Boot Block Configuration Available
128-bit Protection Register
Common Flash Interface (CFI)
1. Description
The AT49SN6416(T) is a 1.8-volt 64-megabit Flash memory. The memory is divided
into multiple sectors and planes for erase operations. The device can be read or
reprogrammed off a single 1.8V power supply, making it ideally suited for In-System
programming. The device can be configured to operate in the asynchronous/page
read (default mode) or burst read mode. The burst read mode is used to achieve a
faster data rate than is possible in the asynchronous/page read mode. If the AVD and
the CLK signals are both tied to GND and the burst configuration register is configured
to perform asynchronous reads, the device will behave like a standard asynchronous
Flash memory. In the page mode, the AVD signal can be tied to GND or can be pulsed
low to latch the page address. In both cases the CLK can be tied to GND.
The AT49SN6416(T) is divided into four memory planes. A read operation can
occur in any of the three planes which is not being programmed or erased. This con-
current operation allows improved system performance by not requiring the system to
wait for a program or erase operation to complete before a read is performed. To fur-
ther increase the flexibility of the device, it contains an Erase Suspend and Program
Suspend feature. This feature will put the erase or program on hold for any amount of