REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
ADP3166
*
5-Bit Programmable 2-, 3-, 4-Phase
Synchronous Buck Controller
*Patent pending
FEATURES
Selectable 2-, 3- or 4-Phase Operation at up to
1 MHz per Phase
Differential Sensing Error ±1% over Temperature
Logic-Level PWM Outputs for Interface to
External High Power Drivers
Active Current Balancing between All Output Phases
Built-in Power Good Blanking Supports On-the-Fly
VID Code Changes
5-Bit Digitally Programmable 0.8 V to 1.55 V Output
Short-Circuit Protection with Programmable
Latch-Off Delay
Overvoltage Protection Crowbar Logic Output
APPLICATIONS
Desktop PC Power Supplies
Next-Generation AMD Processors
VRM Modules
FUNCTIONAL BLOCK DIAGRAM
VCC
PRECISION
REFERENCE
SOFT
START
UVLO
SHUTDOWN
AND BIAS
OSCILLATOR
–
+
GND
ADP3166
EN
DELAY
ILIMIT
PWRGD
RTRAMPADJ
PWM2
FB
PWM3
PWM4
SW1
CSSUM
CSCOMP
SW2
SW3
SW4
CSREF
PWM1
VID4 VID3 VID2 VID1 VID0FBRTN
COMP
VID
DAC
+
–
DAC + 300mV
+
–
DAC – 300mV
+
–
+
–
CSREF
CSREF
2.1V
EN CURRENT
LIMIT
CIRCUIT
CROWBAR CURRENT
LIMIT
+
–
CMP
+
–
CMP
+
–
CMP
–
+
+
–
CMP
CURRENT
BALANCING
CIRCUIT
2-, 3- , 4-PHASE
DRIVER LOGIC
ENSET
RESET
RESET
RESET
RESET
CROWBAR
28
11
6
15
12
9
7 1 2 3 4 5
8
18
16
17
20
21
22
23
24
25
26
27
1314
10 DELAY
19
GENERAL DESCRIPTION
The ADP3166 is a highly efficient, multiphase, synchronous
buck switching regulator controller optimized for converting a
12 V main supply into the core supply voltage required by high
performance AMD processors. It uses an internal 5-bit DAC to
read a voltage identification (VID) code directly from the pro-
cessor, which is used to set the output voltage between 0.8 V
and 1.55 V. The ADP3166 also uses a multimode PWM
architecture to drive the logic-level outputs at a programmable
switching frequency that can be optimized for VRM size and
efficiency. The phase relationship of the output signals can be
programmed to provide 2-, 3-, or 4-phase operation, allowing
for the construction of up to four complementary buck switch-
ing stages.
The ADP3166 includes programmable no-load offset and slope
functions to adjust the output voltage as a function of the load
current so that it is always optimally positioned for a system
transient. The ADP3166 also provides accurate and reliable
short-circuit protection, adjustable current limiting, and a delayed
power good output that accommodates on-the-fly output volt-
age changes requested by the CPU.
ADP3166 is specified over the commercial temperature range of
0°C to 85°C and is available in a 28-lead TSSOP package.