1/12August 2004
a73 HIGH SPEED :
t
PD
= 6.0ns (TYP.) at V
CC
= 3.3V
a73 5V TOLERANT INPUTS
a73 INPUT VOLTAGE LEVEL :
V
IL
=0.8V, V
IH
=2V at V
CC
=3V
a73 LOW POWER DISSIPATION:
I
CC
= 2 µA (MAX.) at T
A
=25°C
a73 LOW NOISE:
V
OLP
= 0.3V (TYP.) at V
CC
= 3.3V
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
a73 PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 139
a73 IMPROVED LATCH-UP IMMUNITY
a73 POWER DOWN PROTECTION ON INPUTS
DESCRIPTION
The 74LVX139 is a low voltage CMOS DUAL 2
TO 4 DECODER/DEMULTIPLEXER fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
The active low enable input can be used for gating
or as a data input for demultiplexing applications.
While the enable input is held high, all four outputs
are high independently of the other inputs.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVX139
LOW VOLTAGE CMOS
DUAL 2 TO 4 DECODER/DEMULTIPLEXER

Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes
PACKAGE T & R
SOP 74LVX139MTR
TSSOP 74LVX139TTR
TSSOPSOP
Rev. 2