1. General description
The 74AHC2G126; AHCT2G126 is a high-speed Si-gate CMOS device.
The 74AHC2G126; AHCT2G126 provides a dual non-inverting buffer/line driver with
3-state output. The 3-state output is controlled by the output enable input (OE). A LOW at
pin nOE causes the output to assume a high-impedance OFF-state.
2. Features
a73 Symmetrical output impedance
a73 High noise immunity
a73 ESD protection:
a78 HBM EIA/JESD22-A114-B exceeds 2000 V
a78 MM EIA/JESD22-A115-A exceeds 200 V
a78 CDM EIA/JESD22-C101 exceeds 1000 V.
a73 Low power dissipation
a73 Balanced propagation delays
a73 Multiple package options
a73 Specified from −40 °C to +85 °C and from −40 °C to +125 °C.
3. Quick reference data
74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
Rev. 02 — 21 September 2004 Product data sheet
Table 1: Quick reference data
GND = 0 V; T
amb
= 25 °C; t
r
= t
f
≤ 3.0 ns.
Symbol Parameter Conditions Min Typ Max Unit
Type 74AHC2G126
t
PHL
, t
PLH
propagation delay
nA to nY
C
L
= 15 pF; V
CC
= 5 V - 3.4 5.5 ns
C
I
input capacitance - 1.5 10 pF
C
PD
power dissipation
capacitance
C
L
= 50 pF; f
i
= 1 MHz
[1] [2]
-10-pF