1/15September 2003
a73 HIGH SPEED: t
PD
= 4.4ns (MAX.) at T
A
=85°C
V
CCA
=3.0VV
CCB
=2.3V
a73 LOW POWER DISSIPATION:
I
CCA
=I
CCB
=20µA(MAX.) at T
A
=85°C
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OHA
|=I
OLA
= 8mA MIN at
V
CCA
=3.0VV
CCB
= 1.65V or 2.3V
|I
OHA
|=I
OLA
= 18mA MIN at
V
CCA
=2.3VV
CCB
= 1.65V)
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
a73 POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
a73 26ΩSERIESRESISTORONASIDEOUTPUTS
a73 OPERATING VOLTAGE RANGE:
V
CCA
(OPR) = 2.3V to 3.6V (1.2V Data
Retention)
V
CCB
(OPR) = 1.65V to 2.7V (1.2V Data
Retention)
a73 PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16245
a73 LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
a73 ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74VCX1632245 is a dual supply low voltage
CMOS 16-BIT BUS TRANSCEIVER fabricated
with sub-micron silicon gate and five-layer metal
wiring C
2
MOS technology. Designed for use as an
interface between a 3.3V bus and a 2.5V or 1.8V
bus in a mixed 3.3V/1.8V,3.3V/2.5V and 2.5V/
1.8V supply systems, it achieves high speed
operation while maintaining the CMOS low power
dissipation.
This IC is intended for two-way asynchronous
communication between data buses and the
direction of data transmission is determined by
nDIR inputs. The enable inputs nG canbeusedto
disable the device so that the buses are effectively
isolated. The A-port interfaces with the 3V bus, the
B-port with the 2.5V and 1.8V bus.
All inputs are equipped with protection circuits
against static discharge, giving them 2KV ESD im-
munity and transient excess voltage. All floating
bus terminals during High Z State must be held
HIGH or LOW.
74VCX1632245
16-BIT DUAL SUPPLY BUS TRANSCEIVER
LEVEL TRANSLATOR WITH A SIDE SERIES RESISTOR
ORDER CODES
PACKAGE TRAY T & R
TSSOP48 74VCX1632245TTR
TFBGA54 74VCX1632245LB 74VCX1632245LBR
µTFBGA42 74VCX1632245TB 74VCX1632245TBR
TSSOP µTFBGATFBGA
LOGIC DIAGRAM
n = 1, 2