SN54AHC374, SN74AHC374
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS

SCLS240I – OCTOBER 1995 – REVISED JULY 2003
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 Operating Range 2-V to 5.5-V V
CC
C0068 3-State Outputs Drive Bus Lines Directly
C0068 Latch-Up Performance Exceeds 250 mA Per
JESD 17
C0068 ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54AHC374 ...J OR W PACKAGE
SN74AHC374 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AHC374 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2D
2Q
3Q
3D
4D
1D 1Q OE
5Q 5D
8Q
4Q
GND
CLK
V
CC
8D
7D
7Q
6Q
6D
description/ordering information
The ’AHC374 devices are octal edge-triggered D-type flip-flops that feature 3-state outputs designed
specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly
suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels of the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without
interface or pullup components.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N Tube SN74AHC374N SN74AHC374N
SOIC DW
Tube SN74AHC374DW
AHC374 –
Tape and reel SN74AHC374DWR
40°Cto85°C
SOP – NS Tape and reel SN74AHC374NSR AHC374
– C to 85
SSOP – DB Tape and reel SN74AHC374DBR HA374
TSSOP PW
Tube SN74AHC374PW
HA374 –
Tape and reel SN74AHC374PWR
TVSOP – DGV Tape and reel SN74AHC374DGVR HA374
CDIP – J Tube SNJ54AHC374J SNJ54AHC374J
–55°C to 125°C CFP – W Tube SNJ54AHC374W SNJ54AHC374W
LCCC – FK Tube SNJ54AHC374FK SNJ54AHC374FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright  2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.