1/10October 2002
a73 5V TOLERANT INPUTS
a73 HIGH SPEED: t
PD
= 4.2ns (MAX.) at V
CC
=3V
a73 LOW POWER DISSIPATION:
I
CC
=1µA(MAX.)atT
A
=25°C
a73 POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=I
OL
= 24mA (MIN) at V
CC
=3V
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 5.5V
(1.2V Data Retention)
a73 IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LX1G02 is a low voltage CMOS SINGLE
2-INPUT NOR GATE fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge.
74LX1G02
SINGLE 2-INPUT NOR GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE T & R
SOT23-5L 74LX1G02STR
SOT323-5L 74LX1G02CTR
SOT323-5LSOT23-5L