74FCT162500ATPVCT
器件描述:18-Bit Registered Transceivers
文件大小:63.43KB,共6页
Sponsor by e络盟
器件资料摘要:
18-Bit Registered Transceivers
CY74FCT16500T
CY74FCT162500T
SCCS056 - August 1994 - Revised March 2000
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
Copyright © 2000, Texas Instruments Incorporated
Features
• FCT-C speed at 4.6 ns
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for significantly improved
noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
• Industrial temperature range of - 40˚C to +85˚C
•V
CC
= 5V – 10%
CY74FCT16500T Features:
• 64 mA sink current, 32 mA source current
• Typical V
OLP
(ground bounce) <1.0V at V
CC
= 5V,
T
A
= 25˚C
CY74FCT162500T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical V
OLP
(ground bounce) <0.6V at V
CC
= 5V,
T
A
= 25˚C
Functional Description
These 18-bit universal bus transceivers can be operated in
transparent, latched, or clock modes by combining D-type
latches and D-type flip-flops. Data flow in each direction is
controlled by output-enable (OEAB and OEBA), latch enable
(LEAB and LEBA), and clock inputs (CLKAB and CLKBA)
inputs. For A-to-B data flow, the device operates in transparent
mode when LEAB is HIGH. When LEAB is LOW, the A data is
latched if CLKAB is held at a HIGH or LOW logic level. If LEAB
is LOW, the A bus data is stored in the latch/flip-flop on the
HIGH-to-LOW transition of CLKAB. OEAB performs the output
enable function on the B port. Data flow from B-to-A is similar
to that of A-to-B and is controlled by OEBA, LEBA, and
CLKBA. The output buffers are designed with power-off
disable feature that allows live insertion of boards.
The CY74FCT16500T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162500T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162500T is ideal for driving transmission lines.
GND
Logic Block Diagram Pin Configuration
1
2
3
4
5
6
7
8
9
10
11
12
33
32
31
30
29
36
35
OEAB
34
SSOP/TSSOP
Top View
13
14
15
16
17
18
19
20
21
22
23
24
45
44
43
42
41
37
38
39
40
48
47
46
LEAB
A
1
A
2
A
3
B
1
B
2
B
3
GND
GND
GND
V
CC
A
6
A
7
A
4
A
5
B
4
B
5
B
6
B
7
V
CC
GND
A
10
A
11
A
8
A
9
B
8
B
9
B
11
B
12
GND
A
12
V
CC
A
16
GND
A
14
V
CC
A
15
A
17
FCT16500-1
TO 17 OTHER CHANNELS
LEAB
OEBA
LEBA
CLKAB
CLKBA
OEAB
C
D
C
D
C
D
C
D
A
1
B
1
25
26
27
28
49
52
51
50
A
13
OEBA
LEBA
GND
A
18
CLKAB
53
56
55
54
B
10
GND
B
14
B
15
B
13
B
16
B
17
GND
B
18
CLKBA
FCT16500-2