AMD P R E L I M I N A R Y
2 Am186EM and Am188EM Microcontrollers
Am186EM MICROCONTROLLER BLOCK DIAGRAM
S2–S0
Interrupt
Control Unit
Timer Control
Unit
DMA
Unit
Bus
Interface
Unit
Execution
Unit
Chip-Select
Unit
Clock and
Power
Management
Unit
Control
Registers
16-Bit Count
Registers
Max Count A
Registers
16-Bit Count
Registers
20-Bit Destination
Pointers
20-Bit Source
Pointers
Control
Registers
Control
Registers
Control
Registers
0 1 (WDT) 2 0 1
Max Count B
Registers
Refresh
Control
Unit
Control
Registers
Control
Registers
Control
Registers
CLKOUTB
CLKOUTA
INT4
INT3/INTA1/IRQ
INT2/INTA0
INT1/SELECT
INT0
TMROUT0 TMROUT1
DRQ0 DRQ1
V
CC
GND
TMRIN0 TMRIN1
ARDY
SRDY
DT/R
DEN
HOLD
HLDA
Asynchronous
Serial Port
Synchronous Serial
Interface
TXD
RXD
SCLK
SDATA
SDEN0 SDEN1
NMI
A19–A0
AD15–AD0
ALE
BHE/ADEN
WR
WLB
WHB
RD
RES
LCS/ONCE0
MCS2–MCS0
PCS6/A2
PCS3–PCS0
PCS5/A1
UCS/ONCE1
X2
X1
Control
Registers
PSRAM
Control
Unit
MCS3/RFSH
PIO
Unit
PIO31–
PIO0*
Note:
* All PIO signals are shared with other physical pins. See the pin descriptions beginning on page 24 and Table 2
on page 28 for information on shared function.
Control
Registers
S6/
UZI
CLKDIV2