2.7 V to 5.5 V, <100 µA, 14-Bit
nanoDAC™ D/A in SC70 Package
Preliminary Technical Data
AD5641


Rev. PrC
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FEATURES
6-lead SC70 package
Power-down to <100 nA @ 3 V
Single 14-bit DAC:
B Version: ±4 LSB INL
A Version: ±8 LSB INL
Micropower operation: max 100 µA @ 5 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to 0 V with brownout detection
3 power-down functions
Low power serial interface with Schmitt-triggered inputs
On-chip output buffer amplifier, rail-to-rail operation
SYNC interrupt facility

APPLICATIONS
Voltage level setting
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators

GENERAL DESCRIPTION
The AD5641, a member of the nanoDAC family, is a single,
14-bit, buffered, voltage out DAC that operates from a single
2.7 V to 5.5 V supply, consuming <100 µA at 5 V. The part
comes in a tiny SC70 package. Its on-chip precision output
amplifier allows rail-to-rail output swing to be achieved. The
AD5641 utilizes a versatile 3-wire serial interface that operates
at clock rates up to 30 MHz and is compatible with SPI®, QSPI™,
MICROWIRE™, and DSP interface standards. The reference for
AD5641 is derived from the power supply inputs and, therefore,
gives the widest dynamic output range. The part incorporates a
power-on reset circuit, which ensures that the DAC output
powers up to 0 V and remains there until a valid write to the
device takes place.
The AD5641 contains a power-down feature that reduces
current consumption to <100 nA at 3 V, and provides software-
selectable output loads while in power-down mode. The part is
put into power-down mode over the serial interface. The low
power consumption of the part in normal operation makes it
ideally suited to portable battery-operated equipment. The
combination of small package and low power makes this
nanoDAC device ideal for level-setting requirements such as
generating bias or control voltages in space-constrained and
power-sensitive applications.

FUNCTIONAL BLOCK DIAGRAM
POWER-ON
RESET
DAC
REGISTER
14-BIT
DAC
INPUT
CONTROL
LOGIC
POWER-DOWN
CONTROL LOGIC
AD5641
V
DD GND
REF(+)
RESISTOR
NETWORK
V
OUT
SYNC
SCLK DIN
OUTPUT
BUFFER
04611-A
-
001

Figure 1.
Table 1. Related Devices
Part Number Description
AD5601/AD5611/AD5621 2.7 V to 5.5 V, <100 µA, 8-/10-/12-Bit,
nanoDAC™ D/A, SPI Interface, SC70
Package

The AD5641 is designed with new technology and comes in a
space-saving SC70 package.
PRODUCT HIGHLIGHTS
1. Available in a space-saving 6-lead SC70 package.
2. Low power, single-supply operation. The AD5641 operates
from a single 2.7 V to 5.5 V supply and typically consumes
0.2 mW at 3 V and 0.5 mW at 5 V, making it ideal for
battery-powered applications.
3. The on-chip output buffer amplifier allows the output of
the DAC to swing rail-to-rail with a typical slew rate of
0.5 V/µs.
4. Reference derived from the power supply.
5. High speed serial interface with clock speeds up to
30 MHz.
6. Designed for very low power consumption. The interface
powers up only during a write cycle.
7. Power-down capability. When powered down, the DAC
typically consumes <100 nA at 3 V.
8. Power-on reset with brownout detection.