54AC11020, 74AC11020
DUAL 4-INPUT POSITIVE-NAND GATES

SCAS154 – MARCH 1987 – REVISED APRIL 1993
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright  1993, Texas Instruments Incorporated
2–1
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
• EPIC (Enhanced-Performance Implanted
CMOS) 1-m m Process
• 500-mA Typical Latch-Up Immunity
at 125°C
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs

description
These devices contain two independent 4-input
NAND gates. They perform the Boolean functions
Y = A • B • C • D or Y = A + B + C + D in positive
logic.
The 54AC11020 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The 74AC11020 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A B C D
Y
H H H H L
L XXX H
X LXX H
X XLX H
X X X L H
54AC11020 ...J PACKAGE
74AC11020 ...D OR N PACKAGE
(TOP VIEW)
54AC11020 . . . FK PACKAGE
(TOP VIEW)
NC – No internal connection
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1B
1A
1Y
GND
2Y
2D
2C
NC
1C
1D
V
CC
2A
2B
NC
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
2B
NC
NC
NC
2C
NC
NC
1B
NC
1A
1C NC
2Y 2D
2A
1Y
GND
NC
V1D
CC
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.