SBAS308A − MAY 2004 − REVISED MARCH 2005
C0049C0052C0262C0066C0105C0116C0044 C0056C0048C0077C0083C0080C0083
C0065C0110C0097C0108C0111C0103C0262C0116C0111C0262C0068C0105C0103C0105C0116C0097C0108 C0067C0111C0110C0118C0101C0114C0116C0101C0114
C0065C0068C0083C0053C0053C0052C0050
FEATURES
C0068 14-Bit Resolution
C0068 80MSPS Sample Rate
C0068 High SNR: 72.9dBFS at 100 MHz f
IN
C0068 High SFDR: 88dBc at 100 MHz f
IN
C0068 2.3V
PP
Differential Input Voltage
C0068 Internal Voltage Reference
C0068 3.3V Single-Supply Voltage
C0068 Analog Power Dissipation: 545mW
− Output Buffer Power: 129mW
C0068 TQFP-64 PowerPADC0069 Package
C0068 Recommended Op Amps:
THS3202, THS3201, THS4503,
OPA695, OPA847
C0068 Pin-Compatible with:
− ADS5500 (14-Bit, 125MSPS)
− ADS5541 (14-Bit, 105MSPS)
− ADS5520 (12-Bit, 125MSPS)
− ADS5521 (12-Bit, 105MSPS)
− ADS5522 (12-Bit, 80MSPS)
APPLICATIONS
C0068 Wireless Communication
− Communication Receivers
− Base Station Infrastructure
C0068 Test and Measurement Instrumentation
C0068 Single and Multichannel Digital Receivers
C0068 Communication Instrumentation
− Radar, Infrared
C0068 Video and Imaging
C0068 Medical Equipment
C0068 Military Equipment
DESCRIPTION
The ADS5542 is a high-performance, 14-bit, 80MSPS analog-to-digital converter (ADC). To provide a complete converter
solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for
applications demanding the highest speed and highest dynamic performance in very little space, the ADS5542 has
excellent analog power dissipation of 545mW and output buffer power dissipation of 129mW from a 3.3V single-supply
voltage. This allows an even higher system integration density. The provided internal reference simplifies system design
requirements. Parallel CMOS compatible output ensures seamless interfacing with common logic.
The ADS5542 is available in a 64-pin TQFP PowerPAD package and is pin-compatible with the ADS5500, ADS5541,
ADS5520, ADS5521, and ADS5522. This device is specified over the full temperature range of −40°C to +85°C.
14−Bit
Pipeline
ADC Core
S&H
CLK+
CLK−
CLKOUT
V
IN
+
V
IN
−
Digital
Error
Correction
Timing Circuitry
Internal
Reference
Control Logic
Serial Programming Register
Output
Control
AV
DD
D0
.
.
.
D13
CM
OVR
DFS
ADS5542
A
GND
DR
GND
SEN SDATA SCLK
DRV
DD
C0080C0082C0079C0068C0085C0067C0084C0073C0079C0078 C0068C0065C0084C0065 C0105C0110C0102C0111C0114C0109C0097C0116C0105C0111C0110 C0105C0115 C0099C0117C0114C0114C0101C0110C0116 C0097C0115 C0111C0102 C0112C0117C0098C0108C0105C0099C0097C0116C0105C0111C0110 C0100C0097C0116C0101C0046 C0080C0114C0111C0100C0117C0099C0116C0115
C0099C0111C0110C0102C0111C0114C0109 C0116C0111 C0115C0112C0101C0099C0105C0102C0105C0099C0097C0116C0105C0111C0110C0115 C0112C0101C0114 C0116C0104C0101 C0116C0101C0114C0109C0115 C0111C0102 C0084C0101C0120C0097C0115 C0073C0110C0115C0116C0114C0117C0109C0101C0110C0116C0115 C0115C0116C0097C0110C0100C0097C0114C0100 C0119C0097C0114C0114C0097C0110C0116C0121C0046
C0080C0114C0111C0100C0117C0099C0116C0105C0111C0110 C0112C0114C0111C0099C0101C0115C0115C0105C0110C0103 C0100C0111C0101C0115 C0110C0111C0116 C0110C0101C0099C0101C0115C0115C0097C0114C0105C0108C0121 C0105C0110C0099C0108C0117C0100C0101 C0116C0101C0115C0116C0105C0110C0103 C0111C0102 C0097C0108C0108 C0112C0097C0114C0097C0109C0101C0116C0101C0114C0115C0046
PowerPad is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
www.ti.com
Copyright  2004−2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.