1. General description
The 74LVC2G66 is a high-performance, low-power, low-voltage, Si-gate CMOS device.
The 74LVC2G66 provides two analog switches. Each switch has a input and output (pins
Yand Z) and an active HIGH enable input (pin E). When pin E is LOW, the analog switch
is turned off.
2. Features
a73 Wide supply voltage range from 1.65 V to 5.5 V
a73 Very low ON-resistance:
a78 7.5 Ω (typical) at V
CC
= 2.7 V
a78 6.5 Ω (typical) at V
CC
= 3.3 V
a78 6 Ω (typical) at V
CC
=5V.
a73 High noise immunity
a73 Complies with JEDEC standard:
a78 JESD8-7 (1.65 V to 1.95 V)
a78 JESD8-5 (2.3 V to 2.7 V)
a78 JESD8-B/JESD36 (2.7 V to 3.6 V).
a73 ESD protection:
a78 HBM EIA/JESD22-A114-B exceeds 2000 V
a78 MM EIA/JESD22-A115-A exceeds 200 V.
a73 CMOS low-power consumption
a73 Latch-up performance meets requirements of JESD78 Class I
a73 Direct interface with TTL levels
a73 Enable inputs accept voltages up to 5 V
a73 SOT505-2 and SOT765-1 package
a73 Specified from −40 °C to +85 °C and −40 °C to +125 °C.
3. Quick reference data
74LVC2G66
Bilateral switch
Rev. 01 — 29 June 2004 Product data sheet
Table 1: Quick reference data
GND = 0 V; T
amb
=25°C; t
r
=t
f
≤ 2.5 ns.
Symbol Parameter Conditions Min Typ Max Unit
t
PZH
, t
PZL
turn-on time nE to V
OS
C
L
= 50 pF; R
L
= 500 Ω
V
CC
= 3 V - 2.4 - ns
V
CC
= 5 V - 1.8 - ns