1/7June 2003
a73 HIGH SPEED: t
PD
= 3.5ns (TYP.) at V
CC
=5V
a73 LOW POWER DISSIPATION:
I
CC
=1µA(MAX.) at T
A
=25°C
a73 HIGH NOISE IMMUNITY:
V
NIH
=V
NIL
= 10% V
CC
(MIN.)
a73 POWER DOWN PROTECTION ON INPUT
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=I
OL
=8mA(MIN)atV
CC
=4.5V
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
a73 IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2GU04 is an advanced high-speed
CMOS TRIPLE INVERTER (SINGLE STAGE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
The internal circuit is composed of a single stages
inverter, then an unbuffered output.
It can be used in analog application such a crystal
oscillator.
Power down protection is provided on input and 0
to 7V can be accepted on input with no regard to
the supply voltage. This device can be used to
interface5Vto3V.
74V2GU04
TRIPLE INVERTER (SINGLE STAGE)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE T & R
SOT23-8L 74V2GU04STR
SOT323-8LSOT23-8L