14-Bit, 40MHz Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
l HIGH DYNAMIC RANGE:
High SFDR: 83dB at 10MHz f
IN
High SNR: 75dB at 10MHz f
IN
l PREMIUM TRACK-AND-HOLD:
Differential Inputs
Selectable Full-Scale Input Range
l LOW POWER: 850mW
l FLEXIBLE CLOCKING:
Differential or Single-Ended
Accepts Sine or Square Wave Clocking Down to
0.5Vp-p
Variable Threshold Level
DESCRIPTION
The ADS5421 is a high-dynamic range 14-bit, 40MHz,
pipelined Analog-to-Digital Converter (ADC). It includes a
high-bandwidth linear track-and-hold amplifier that gives
excellent spurious performance up to and beyond the Nyquist
rate. The clock input can accept a low-level differential sine
wave or square wave signal down to 0.5Vp-p, further improving
the Signal-to-Noise Ratio (SNR) performance.
The ADS5421 has a 4Vp-p differential input range
(2Vp-p • 2 inputs) for optimum Spurious-Free Dynamic
Range (SFDR). The differential operation gives the lowest
even-order harmonic components. A lower input voltage can
also be selected using the internal references, further
optimizing SFDR.
The ADS5421 is available in a small LQFP-64 package.
APPLICATIONS
l COMMUNICATIONS RECEIVERS
l TEST INSTRUMENTATION
l PROFESSIONAL CCD IMAGING
ADS5421
SBAS237D – DECEMBER 2001 – REVISED JULY 2004
www.ti.com
Copyright © 2001-2004 Texas Instruments, Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ADS5421
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
14-Bit
Pipelined
ADC
Core
Reference and
Mode Select
Reference Ladder
and Driver
Timing Circuitry
Error
Correction
Logic
3-State
Outputs
T&H
D0
D13
•
•
•
+V
S
ADS5421
CLK
DV
CLK
OESEL2 REFBV
REF
REFT VDRV
IN1Vp-p
1Vp-p
CM
(+2.5V)
SEL1
IN