74VHC164
器件描述：8-Bit Serial-In, Parallel-Out Shift Register
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：83.54KB，共7页
Sponsor by e络盟器件资料摘要：
August 1993
Revised April 1999
7
4
VH
C16
4
8-
Bit
Ser
i
al
-I
n,
Par
a
ll
el-
O
ut
Shif
t
Regis
t
er
© 1999 Fairchild Semiconductor Corporation DS011636.prf www.fairchildsemi.com
74VHC164
8-Bit Serial-In, Parallel-Out Shift Register
General Description
The VHC164 is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It achieves
the high-speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation. The VHC164 is a high-speed 8-Bit Serial-In/Paral-
lel-Out Shift Register. Serial data is entered through a 2-
input AND gate synchronous with the LOW-to-HIGH transi-
tion of the clock. The device features an asynchronous
Master Reset which clears the register, setting all outputs
LOW independent of the clock. An input protection circuit
insures that 0V to 7V can be applied to the input pins with-
out regard to the supply voltage. This device can be used
to interface 5V to 3V systems and two supply systems such
as battery backup. This circuit prevents device destruction
due to mismatched supply and input voltages.
Features
a73 High Speed: f
MAX
= 175 MHz at V
CC
= 5V
a73 Low power dissipation: I
CC
= 4 µA (max) at T
A
= 25°C
a73 High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
a73 Power down protection provided on all inputs
a73 Low noise: V
OLP
= 0.8V (max)
a73 Pin and function compatible with 74HC164
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
74VHC164M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74VHC164SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC164MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC164N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
A, B Data Inputs
CP Clock Pulse Input (Active Rising Edge)
MR Master Reset Input (Active LOW)
Q
0
–Q
7
Outputs
Revised April 1999
7
4
VH
C16
4
8-
Bit
Ser
i
al
-I
n,
Par
a
ll
el-
O
ut
Shif
t
Regis
t
er
© 1999 Fairchild Semiconductor Corporation DS011636.prf www.fairchildsemi.com
74VHC164
8-Bit Serial-In, Parallel-Out Shift Register
General Description
The VHC164 is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It achieves
the high-speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation. The VHC164 is a high-speed 8-Bit Serial-In/Paral-
lel-Out Shift Register. Serial data is entered through a 2-
input AND gate synchronous with the LOW-to-HIGH transi-
tion of the clock. The device features an asynchronous
Master Reset which clears the register, setting all outputs
LOW independent of the clock. An input protection circuit
insures that 0V to 7V can be applied to the input pins with-
out regard to the supply voltage. This device can be used
to interface 5V to 3V systems and two supply systems such
as battery backup. This circuit prevents device destruction
due to mismatched supply and input voltages.
Features
a73 High Speed: f
MAX
= 175 MHz at V
CC
= 5V
a73 Low power dissipation: I
CC
= 4 µA (max) at T
A
= 25°C
a73 High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
a73 Power down protection provided on all inputs
a73 Low noise: V
OLP
= 0.8V (max)
a73 Pin and function compatible with 74HC164
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
74VHC164M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74VHC164SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC164MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC164N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
A, B Data Inputs
CP Clock Pulse Input (Active Rising Edge)
MR Master Reset Input (Active LOW)
Q
0
–Q
7
Outputs