TL/F/6395
54LS155/DM54LS155/DM74LS155,54LS156/DM54LS156/DM74LS156
Dual
2-Line
to
4-Line
Decoders/Demultiplexers
June 1989
54LS155/DM54LS155/DM74LS155,
54LS156/DM54LS156/DM74LS156
Dual 2-Line to 4-Line Decoders/Demultiplexers
General Description
These TTL circuits feature dual 1-line-to-4-line demultiplex-
ers with individual strobes and common binary-address in-
puts in a single 16-pin package. When both sections are
enabled by the strobes, the common address inputs se-
quentially select and route associated input data to the ap-
propriate output of each section. The individual strobes per-
mit activating or inhibiting each of the 4-bit sections as de-
sired. Data applied to input C1 is inverted at its outputs and
data applied at C2 is true through its outputs. The inverter
following the C1 data input permits use as a 3-to-8-line de-
coder, or 1-to-8-line demultiplexer, without external gating.
Input clamping diodes are provided on these circuits to mini-
mize transmission-line effects and simplify system design.
Features
Y
Applications:
Dual 2-to-4-line decoder
Dual 1-to-4-line demultiplexer
3-to-8-line decoder
1-to-8-line demultiplexer
Y
Individual strobes simplify cascading for decoding or
demultiplexing larger words
Y
Input clamping diodes simplify system design
Y
Choice of outputs:
Totem-pole (LS155)
Open-collector (LS156)
Y
Alternate Military/Aerospace device (54LS155/156) is
available. Contact a National Semiconductor Sales Of-
fice/Distributor for specifications.
Connection Diagram and Function Tables
Dual-In-Line Package
TL/F/6395–1
3-Line-to-8-Line Decoder or
1-Line-to-8-Line Demultiplexer
Inputs Outputs
Select
Strobe
(0) (1) (2) (3) (4) (5) (6) (7)
Or Data
C† BA G‡ 2Y0 2Y1 2Y2 2Y3 1Y0 1Y1 1Y2 1Y3
XXX H HHHHHHHH
LLL L LHHHHHHH
LLH L HLHHHHHH
LHL L HHLHHHHH
LHH L HHHLHHHH
HLL L HHHHLHHH
HLH L HHHHHLHH
HHL L HHHHHHLH
HHH L HHHHHHHL
Order Number 54LS155DMQB, 54LS155FMQB,
54LS155LMQB, DM54LS155J, DM54LS155W,
DM74LS155M, DM74LS155N, 54LS156DMQB,
54LS156FMQB, DM54LS156J, DM54LS156W,
DM74LS156M or DM74LS156N
See NS Package Number E20A, J16A,
M16A, N16E or W16A
2-Line-to-4-Line Decoder or
1-Line-to-4-Line Demultiplexer
Inputs Outputs
Select Strobe Data
B A G1 C1 1Y0 1Y1 1Y2 1Y3
XX H X HHHH
LL L H LHHH
LH L HHLHH
HL L HHHLH
HH L H HHHL
XX X L HHHH
Inputs Outputs
Select Strobe Data
B A G2 C2 2Y0 2Y1 2Y2 2Y3
XX H X HHHH
LL L L LHHH
LH L L HLHH
HL L L HHLH
HH L L HHHL
XX X H HHHH
†Ceinputs C1 and C2 connected together
‡G e inputs G1 and G2 connected together
H e high level, L e low level, X e don’t care
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.