54AC161 • 54ACT161
Synchronous Presettable Binary Counter
General Description
The ’AC/’ACT161 are high-speed synchronous modulo-16
binary counters. They are synchronously presettable for ap-
plication in programmable dividers and have two types of
Count Enable inputs plus a Terminal Count output for versa-
tility in forming synchronous multistage counters. The ’AC/
’ACT161 has an asynchronous Master Reset input that over-
rides all other inputs and forces the outputs LOW.
Features
n I
CC
reduced by 50%
n Synchronous counting and loading
n High-speed synchronous expansion
n Typical count rate of 125 MHz
n Outputs source/sink 24 mA
n ’ACT161 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)
— ’AC161: 5962-89561
— ’ACT161: 5962-91722
Logic Symbols
Pin Names Description
CEP Count Enable Parallel Input
CET Count Enable Trickle Input
CP Clock Pulse Input
MR Asynchronous Master Reset Input
P
0
–P
3
Parallel Data Inputs
PE Parallel Enable Inputs
Q
0
–Q
3
Flip-Flop Outputs
TC Terminal Count Output
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
FACT™ is a trademark of Fairchild Semiconductor Corporation.
DS100274-1
IEEE/IEC
DS100274-2
November 1998
54AC161
•
54ACT161
Synchronous
Presettable
Binary
Counter
© 1998 National Semiconductor Corporation DS100274 www.national.com