1/10July 2003
a73 5V TOLERANT INPUTS AND OUTPUTS
a73 HIGH SPEED:
t
PD
= 4.7 ns (MAX.) at V
CC
=3V
a73 POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=I
OL
= 12mA (MIN) at V
CC
=3V
a73 PCI BUS LEVELS GUARANTEED AT 12 mA
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
a73 BUSHOLDPROVIDEDONBOTHSIDES
a73 PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16245
a73 LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
a73 ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCXHR162245 is a low voltage CMOS 16
BIT BUS TRANSCEIVER (3-STATE) fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology. It is ideal for low
power and high speed 3.3V applications; it can be
interfaced to 5V signal environment for both inputs
and outputs.
This IC is intended for two-way asynchronous
communication between data buses; the direction
of data transmission is determined by DIR input.
The two enable inputs nG canbeusedtodisable
the device so that the buses are effectively isolat-
ed.
Bus hold on data inputs is provided in order to
eliminate the need for external pull-up or
pull-down resistor.
All outputs, which are designed to sink up to
12mA, include 26Ω resistors to reduce overshoot
and undershoot.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
74LCXHR162245
LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER
WITH 5V TOLERANT INPUTS AND OUTPUT (3-STATE)
ORDER CODES
PACKAGE TUBE T & R
TSSOP 74LCXHR162245TTR
TSSOP
PIN CONNECTION