AZ10EL32
AZ100EL32
ECL/PECL ÷ 2 Divider

1630 S. STAPLEY DR., SUITE 125 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541
www.azmicrotek.com

ARIZONA MICROTEK, INC.
FEATURES

• 510ps Propagation Delay
• 3.0GHz Toggle Frequency
• High Bandwidth Output Transitions
• 75kΩ Internal Input Pulldown Resistors
• Direct Replacement for ON
Semiconductor MC10EL32 &
MC100EL32





DESCRIPTION

The AZ10/100EL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge.
Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the synchronization of
multiple EL32’s in a system.
The EL32 provides a V
BB
output for single-ended use or a DC bias reference for AC coupling to the device. For
single-ended input applications, the V
BB
reference should be connected to one side of the CLK/CLK¯¯¯¯ differential input
pair. The input signal is then fed to the other CLK/CLK¯¯¯¯ input. The V
BB
pin should be used only as a bias for the
EL32 as its sink/source capability is limited. When used, the V
BB
pin should be bypassed to ground via a 0.01μF
capacitor.
NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.

















LOGIC DIAGRAM AND PINOUT ASSIGNMENT

1
4
3
2
6
5
7
8
R
÷2
RESET
CLK
CLK
V
BB
V
CC
Q
Q
V
EE

PIN DESCRIPTION

PIN FUNCTION
CLK, CLK¯¯¯ Clock Inputs
RESET Asynchronous Reset
V
BB
Reference Voltage Output
Q, Q¯ Data Outputs
V
CC
Positive Supply
V
EE
Negative Supply

PACKAGE AVAILABILITY

PACKAGE PART NUMBER MARKING NOTES
SOIC 8 AZ10EL32D
AZM10
EL32
1,2
SOIC 8 AZ100EL32D
AZM100
EL32
1,2
SOIC 8 RoHS
Compliant / Lead
(Pb) Free
AZ100EL32D+
AZM100+
EL32
1,2
TSSOP 8 AZ10EL32T
AZT
EL32
1,2
TSSOP 8 AZ100LVEL32T
AZH
EL32
1,2
1 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)
Tape & Reel.
2 Date code format: “Y” or “YY” for year followed by “WW” for week on
underside of part.