BCM5700 FEATURES
BCM5700 10/100/1000 PCI-X NIC Reference Design
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Features wire speed operation at all speeds.
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The BCM5700 is ideal for new high-speed network interface
cards (NIC) and LAN on Motherboard (LOM) applications,
while maintaining backward compatibility with today’s
networks.
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Support for both the PCI 2.2 and PCI-X standard enables
the BCM5700 to run in any PCI-based or PCI-X systems.
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The ultra-deep on-chip packet buffer allows the BCM5700 to
continuously transmit and receive at high speeds in systems
where the PCI/PCI-X bus is shared with other devices.
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On-chip CPUs perform advanced functions and allow the
BCM5700 to evolve with new standards. The CPUs also
provide advanced packet parsing capabilities, making the
BCM5700 an OSI L4 protocol aware device, providing many
advanced features and offloads.
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Advanced offload features promote high throughput, while
minimizing host CPU utilization.
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Combined with the BCM5401 and newer Broadcom
10/100/1000BASE-T PHYs, the BCM5700 supports ACPI-
compliant Wake on LAN implementations.
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Additional manageability features enable NIC and LOM
designs to comply with relevant manageability standards for
server and desktop applications.
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Provides low power operation—0.18 µm advanced process
technology, combined with programmable power
management.
SUMMARY OF BENEFITS
BCM5700 PCI-X 10/100/1000BASE-T CONTROLLER
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10/100/1000 Mbps tri-speed media access controller (MAC)
with wire speed performance at all rates
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Support for PCI v2.2, 32/64-bit, 33/66 MHz, and PCI-X v1.0
32/64-bit, 66/133-MHz bus interfaces
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96 KB ultra-deep packet buffer with support for up to 16 MB
externally
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Support for IEEE 802.3, 802.3u, 802.3z, and 802.3ab
standards
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MII/GMII and TBI (SerDes style) transceiver interfaces
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Advanced CPU offload features include: TCP/UDP/IP
checksum offload, TCP segmentation, 9 KB jumbo frame
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Dual high-speed CPUs
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Microsoft
®
PC99 compliant: support for ACPI ver 1.1a, Wake
on LAN, PXE version 2.0, and statistics for SNMP MIB II,
Ethernet-like MIB, and Ethernet MIB (802.3z, Clause 30)
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Layer 2 priority encoding (802.3p) (up to 16 priority queues)
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VLAN tagging (IEEE 802.3q)
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Flow control (IEEE 802.3x)
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Link aggregation (IEEE802.3ad)
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Multiple power modes with programmable low power
operation
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Low power design – 3.3 V/1.8 V, 0.18 µm CMOS
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5V tolerant PCI I/Os
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388-pin PBGA package
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BriefBrief
BCM5700