1/14November 2004
a73 HIGH SPEED: t
PD
= 4.2ns (TYP.) at V
CC
= 5V
a73 LOW POWER DISSIPATION:
I
CC
= 4 µA (MAX.) at T
A
=25°C
a73 HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
a73 POWER DOWN PROTECTION ON INPUTS
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
a73 PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 594
a73 IMPROVED LATCH-UP IMMUNITY
a73 LOW NOISE: V
OLP
= 0.8V (MAX.)
DESCRIPTION
The 74VHC594 is an high speed CMOS 8-BIT
SHIFT REGISTERS fabricated with sub-micron
silicon gate C
2
MOS technology.
This device contains an 8-bit serial-in, parallel-out
shift register that feeds an 8-bit D-type storage
register. Separate clocks and direct overriding
clear (SCLR, RCLR) are provided for both the shift
register and the storage register.
A serial (QH’) output is provided for cascading
purposes. Both the shift register and storage
register use positive-edge triggered clocks. If the
clocks are connected together, the shift register
state will always be one clock pulse ahead of the
storage register.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs are equipped with protection circuits
against static discharge, giving them 2KV ESD
immunity and transient excess voltage.
74VHC594
8 BIT SHIFT REGISTER
WITH OUTPUT REGISTER

Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes
PACKAGE T & R
SOP M74VHC594RMTR
TSSOP M74VHC594TTR
TSSOPSOP
Rev. 5