SN74AHC1G126
SINGLE BUS BUFFER GATE
WITH 3-STATE OUTPUT

SCLS379D – AUGUST 1997 – REVISED JANUARY 2000
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 EPIC (Enhanced-Performance Implanted
CMOS) Process
C0068 Operating Range 2-V to 5.5-V V
CC
C0068 Latch-Up Performance Exceeds 250 mA Per
JESD 17
C0068 Package Options Include Plastic
Small-Outline Transistor (DBV, DCK)
Packages
description
The SN74AHC1G126 is a single bus buffer gate/line driver with 3-state output. The output is disabled when the
output-enable (OE) input is low. When OE is high, true data is passed from the A input to the Y output.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the
driver.
The SN74AHC1G126 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUT
OE A
Y
H H H
H LL
L X Z
logic symbol
†
EN
1
OE
2
A
Y
4
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
AY
OE
1
24
Copyright  2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
DBV OR DCK PACKAGE
(TOP VIEW)
1
2
3
5
4
OE
A
GND
V
CC
Y