74VHC541
器件描述：Octal Buffer/Line Driver with TRI-STATE Outputs
器件厂商：NSC [National Semiconductor]
文件大小：146.43KB，共8页
Sponsor by e络盟器件资料摘要：
TL/F/11639
74VHC541
Octal
Buffer/Line
Driver
with
TRI-STATE
Outputs
November 1995
74VHC541
Octal Buffer/Line Driver with TRI-STATE Outputs
General Description
The VHC541 is an advanced high-speed CMOS device fab-
ricated with silicon gate CMOS technology. It achieves the
high-speed operation similar to equivalent Bipolar Schottky
TTL while maintaining the CMOS low power dissipation.
The VHC541 is an octal buffer/line driver designed to be
employed as memory and address drivers, clock drivers and
bus oriented transmitter/receivers.
This device is similar in function to the VHC244 while provid-
ing flow-through architecture (inputs on opposite side from
outputs). This pinout arrangement makes this device espe-
cially useful as an output port for microprocessors, allowing
ease of layout and greater PC board density.
An input protection circuit insures that 0V to 7V can be ap-
plied to the input pins without regard to the supply voltage.
This device can be used to interface 5V to 3V systems and
two supply systems such as battery backup. This circuit pre-
vents device destruction due to mismatched supply and in-
put voltages.
Features
Y
Low power dissipation:
I
CC
e 4 mA (max) at T
A
e 25
§C
Y
High noise immunity: V
NIH
e V
NIL
e 28% V
CC
(min)
Y
All inputs are equipped with a power down protection
function
Y
Balanced propagation delays: t
PLH
j
t
PHL
Y
Low noise: V
OLP
e 0.9V (typ)
Y
Pin and function compatible with 74HC541
Commercial Package Number Package Description
74VHC541M M20B 20-Lead Molded JEDEC SOIC
74VHC541SJ M20D 20-Lead Molded EIAJ SOIC
74VHC541MTC MTC20 20-Lead Molded JEDEC Type 1 TSSOP
74VHC541N N20A 20-Lead Molded DIP
Note: Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter ‘‘X’’ to the ordering code.
Logic Symbol
IEEE/IEC
TL/F/11639–1
Connection Diagram
Pin Assignment for DIP,
TSSOP and SOIC
TL/F/11639–2
Truth Table
Inputs
Outputs
OE
1
OE
2
I
LLH H
HXX Z
XH
LLL L
HeHIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Z e High Impedance
TRI-STATE is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M125/Printed in U. S. A.
74VHC541
Octal
Buffer/Line
Driver
with
TRI-STATE
Outputs
November 1995
74VHC541
Octal Buffer/Line Driver with TRI-STATE Outputs
General Description
The VHC541 is an advanced high-speed CMOS device fab-
ricated with silicon gate CMOS technology. It achieves the
high-speed operation similar to equivalent Bipolar Schottky
TTL while maintaining the CMOS low power dissipation.
The VHC541 is an octal buffer/line driver designed to be
employed as memory and address drivers, clock drivers and
bus oriented transmitter/receivers.
This device is similar in function to the VHC244 while provid-
ing flow-through architecture (inputs on opposite side from
outputs). This pinout arrangement makes this device espe-
cially useful as an output port for microprocessors, allowing
ease of layout and greater PC board density.
An input protection circuit insures that 0V to 7V can be ap-
plied to the input pins without regard to the supply voltage.
This device can be used to interface 5V to 3V systems and
two supply systems such as battery backup. This circuit pre-
vents device destruction due to mismatched supply and in-
put voltages.
Features
Y
Low power dissipation:
I
CC
e 4 mA (max) at T
A
e 25
§C
Y
High noise immunity: V
NIH
e V
NIL
e 28% V
CC
(min)
Y
All inputs are equipped with a power down protection
function
Y
Balanced propagation delays: t
PLH
j
t
PHL
Y
Low noise: V
OLP
e 0.9V (typ)
Y
Pin and function compatible with 74HC541
Commercial Package Number Package Description
74VHC541M M20B 20-Lead Molded JEDEC SOIC
74VHC541SJ M20D 20-Lead Molded EIAJ SOIC
74VHC541MTC MTC20 20-Lead Molded JEDEC Type 1 TSSOP
74VHC541N N20A 20-Lead Molded DIP
Note: Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter ‘‘X’’ to the ordering code.
Logic Symbol
IEEE/IEC
TL/F/11639–1
Connection Diagram
Pin Assignment for DIP,
TSSOP and SOIC
TL/F/11639–2
Truth Table
Inputs
Outputs
OE
1
OE
2
I
LLH H
HXX Z
XH
LLL L
HeHIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Z e High Impedance
TRI-STATE is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M125/Printed in U. S. A.