AT24HC02B
器件描述:Utilizes Different Array Protection Compared
文件大小:453.73KB,共16页
Sponsor by e络盟
器件资料摘要:
1
Features
• Write Protect Pin for Hardware Data Protection
– Utilizes Different Array Protection Compared to the AT24C02B
Low-voltage and Standard-voltage Operation
– 1.8 (V
CC
= 1.8V to 5.5V)
Internally Organized 256 x 8 (2K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V) and 400 kHz (1.8V, 2.5V, 2.7V) Clock Rate
8-byte Page
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms Max)
High Reliability
– Endurance: One Million Write Cycles
– Data Retention: 100 Years
8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP Packages
Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
Description
The AT24HC02B provides 2048 bits of serial electrically erasable and programmable
read-only memory (EEPROM) organized as 256 words of 8 bits each. The device is opti-
mized for use in many industrial and commercial applications where low-power and low-
voltage operation are essential. The AT24HC02B is available in space-saving 8-lead
PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a two-wire
serial interface. In addition, the entire family is available in 1.8V (1.8V to 5.5V) version.
Table 1. Pin Configuration
Pin Name Function
A0–A2 Address Inputs
SDA Serial Data
SCL Serial Clock Input
WP Write Protect
NC No-connect
Two-wire Serial
EEPROM
2K (256 x 8)
AT24HC02B
Rev. 5134A–SEEPR–9/05
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
8-lead PDIP
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
8-lead SOIC
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
8-lead TSSOP