11825-102
器件描述:Three-PLL Clock Generator IC
文件大小:64.3KB,共7页
Sponsor by e络盟
器件资料摘要:
AMERICAN MICROSYSTEMS, INC.
April 2000
This document contains information on a product under development. American Microsystems, Inc. reserves the right to change or discontinue this product without notice.
4.26.00
FS6322-04
Three-PLL Clock Generator IC
ISO9001
1.0 Features
• Three PLLs with deep reference, feedback, and post
dividers to provide precision clock frequencies
• Multiple outputs provide several clocking options
• Outputs may be tristated for board testing
• S0, S1, and S2 inputs modify output frequencies for
design flexibility
• 3.3V operation
• Accepts 5 to 30MHz crystals (see Frequency Table
for specific reference frequencies required)
• Custom frequency patterns, pinouts, and packages
are available. Contact your local AMI Sales Repre-
sentative for more information.
2.0 Description
The FS6322 is a ROM-based CMOS clock generator IC
designed to minimize cost and component count in a va-
riety of electronic systems.
Three low-jitter phase-locked loops (PLLs) drive up to five
low-skew clock outputs to provide a high degree of flexi-
bility. The device is packaged in a 16-pin SOIC to mini-
mize board space.
High-resolution divider capability permits generation of
desired frequencies.
Figure 1: Pin Configuration
1 16
2
3
4
5
6
7
8
15
14
13
12
11
10
9
CLK_C
VDD
VSS
XIN
XOUT/REFIN
CLK_E
CLK_D
CLK_F CLK_B
CLK_A
VSS
S0
S1
VDD
S2
OE
F
S
63
22
16-pin (0.150”) SOIC
Figure 2: Block Diagram
FS6322-04
Crystal
Oscillator
XOUT
XIN
PLL A
PLL B
PLL C
Clock
Logic
CLK_E
CLK_F
CLK_A
CLK_B
CLK_C
CLK_D
S2:S0
OE
Device
Control