1/8June 2003
a73 HIGH SPEED: t
PD
= 3.0ns (TYP.) at V
CC
=5V
a73 LOW POWER DISSIPATION:
I
CC
=1µA(MAX.) at T
A
=25°C
a73 TYPICAL HYSTERESIS:
V
H
= 800mV at V
CC
=4.5V
V
H
= 500mV at V
CC
=3.0V
a73 POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=I
OL
=8mA(MIN)atV
CC
=4.5V
II
OH
|=I
OL
=4mA(MIN)atV
CC
=3.0V
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
a73 IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2G14 is an advanced high-speed CMOS
TRIPLE SCHMITT TRIGGER INVERTER
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS tecnology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage.
Pin configuration and function are the same as
those of the 74V2G04, but 74V2G14 has
hysteresis on inputs.
This device can be used to interface 5V to 3V
systems and it is ideal for portable applications
like personal digital assistant, camcorder and all
battery-powered equipment.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
74V2G14
TRIPLE SCHMITT INVERTER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE T & R
SOT23-8L 74V2G14STR
SOT23-8L