54ACT11253, 74ACT11253
DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCAS040A – D3110, MARCH 1988 – REVISED APRIL 1993
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright  1993, Texas Instruments Incorporated
2–1
• Inputs Are TTL-Voltage Compatible
• 3-State Version of ′ACT11153
• Permits Multiplexing From N Lines to
One Line
• Performs Parallel-to-Serial Conversion
• Package Options Include Plastic Small-
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
• EPICC0116 (Enhanced-Performance Implanted
CMOS) 1-C0109m Process
description
Each of these data selectors/multiplexers
contains inverters and drivers to supply full binary
decoding data selection to the AND-OR gates.
Separate output control inputs are provided for
each of the two four-line sections.
The 3-state outputs can interface with and drive
data lines of bus-organized systems. With all but
one of the common outputs disabled (at a
high-impedance state), the low-impedance of
the single enabled output will drive the bus line
to a high or low logic level. Each output has
its own strobe (G). The outputs are disabled when
G is high.
The 54ACT11253 is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The 74ACT11253 is characterized for
operation from – 40°C to 85°C.
FUNCTION TABLE
SELECT
INPUTS
DATA INPUTS
OUTPUT
CONTROL
OUTPUT
Y
B A C0 C1 C2 C3
G
X X X X X X H Z
L LLXXX L L
L LHXXX L H
L HXLXX L L
L HXHXX L H
H LXXLX L L
H LXXHX L H
H HXXXL L L
H H X X X H L H
Address inputs A and B are common to both sections.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
B
1Y
GND
2Y
1G
2G
2C3
1C0
1C1
1C2
1C3
V
CC
2C0
2C1
2C2
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
2C1
2C2
NC
2C3
2G
1C1
1C0
NC
A
B
54ACT11253 . . . FK PACKAGE
(TOP VIEW)
1C2 1C3 NC
1G
2C0
1Y
GND
NC
NC – No internal connection
CC
V
2Y
logic symbol
†
2Y
1Y
5
3
2C2
2C1
2C0
2G
1C3
1C2
1C1
1G
B
A
9
10
11
7
13
14
15
6
2
1
EN
1
0
16
2C3
8
0
1
2
3
MUX
G
0
3
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
1C0
54ACT11253 ...J PACKAGE
74ACT11253 ...D OR N PACKAGE
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC is a trademark of Texas Instruments Incorporated.