TL/F/9467
54F/74F64
4-2-3-2-Input
AND-OR-Invert
Gate
November 1994
54F/74F64
4-2-3-2-Input AND-OR-Invert Gate
General Description
This device contains gates configured to perform a 4-2-3-2
input AND-OR-INVERT function.
Commercial Military
Package
Package Description
Number
74F64PC N14A 14-Lead (0.300 Wide) Molded Dual-In-Line
54F64DM (Note 2) J14A 14-Lead Ceramic Dual-In-Line
74F64SC (Note 1) M14A 14-Lead (0.150 Wide) Molded Small Outline, JEDEC
54F64FM (Note 2) W14B 14-Lead Cerpack
54F64LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13 reel. Use suffix e SCX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix e DMQB, FMQB and LMQB.
Logic Symbol
IEEE/IEC
TL/F/9467–3
Connection Diagrams
Pin Assignment for
DIP, SOIC and Flatpak
TL/F/9467–2
Pin Assignment
for LCC
TL/F/9467–1
Unit Loading/Fan Out
54F/74F
Pin Names Description
U.L. Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
A
n
,B
n
,C
n
,D
n
Inputs 1.0/1.0 20 mA/b0.6 mA
O Output 50/33.3 b1 mA/20 mA
TRI-STATE is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.