TL/F/9527
54F/74F379
Quad
Parallel
Register
with
Enable
August 1995
54F/74F379
Quad Parallel Register with Enable
General Description
The ’F379 is a 4-bit register with buffered common Enable.
This device is similar to the ’F175 but features the common
Enable rather than common Master Reset.
Features
Y
Edge triggered D-type inputs
Y
Buffered positive edge-triggered clock
Y
Buffered common enable input
Y
True and complement outputs
Y
Guaranteed 4000V minimum ESD protection
Commercial Military
Package
Package Description
Number
74F379PC N16E 16-Lead (0.300 Wide) Molded Dual-In-Line
54F379DM (QB) J16A 16-Lead Ceramic Dual-In-Line
74F379SC (Note 1) M16A 16-Lead (0.300 Wide) Molded Small Outline, JEDEC
74F379SJ (Note 1) M16D 16-Lead (0.300 Wide) Molded Small Outline, EIAJ
54F379FM (QB) W16A 16-Lead Cerpack
54F379LM (QB) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13 reel. Use suffix e SCX and SJX.
Logic Symbols
IEEE/IEC
TL/F/9527–5
Connection Diagrams
Pin Assignment
DIP, SOIC and Flatpak
TL/F/9527–1
Pin Assignment
for LCC
TL/F/9527–2
TL/F/9527–3
TRI-STATE is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.