TL/F/9462
54F/74F20
Dual
4-Input
NAND
Gate
November 1994
54F/74F20
Dual 4-Input NAND Gate
General Description
This device contains two independent gates, each of which
performs the logic NAND function.
Commercial Military
Package
Package Description
Number
74F20PC N14A 14-Lead (0.300 Wide) Molded Dual-In-Line
54F20DM (Note 2) J14A 14-Lead Ceramic Dual-In-Line
74F20SC (Note 1) M14A 14-Lead (0.150 Wide) Molded Small Outline, JEDEC
74F20SJ (Note 1) M14D 14-Lead (0.300 Wide) Molded Small Outline, EIAJ
54F20FM (Note 2) W14B 14-Lead Cerpack
54F20LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13 reel. Use suffix e SCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix e DMQB, FMQB and LMQB.
Logic Symbol
IEEE/IEC
TL/F/9462–3
Connection Diagrams
Pin Assignment
for DIP, SOIC and Flatpak
TL/F/9462–2
Pin Assignment
for LCC
TL/F/9462–1
Unit Loading/Fan Out
54F/74F
Pin Names Description
U.L. Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
A
n
,B
n
,C
n
,D
n
Inputs 1.0/1.0 20 mA/b0.6 mA
O
n
Outputs 50/33.3 b1 mA/20 mA
TRI-STATE is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.