1/13April 2004
a73 5V TOLERANT INPUTS
a73 HIGH SPEED: t
PD
= 4.7ns (MAX.) at V
CC
=3V
a73 LOW POWER DISSIPATION:
I
CC
=1µA(MAX.)atT
A
=25°C
a73 POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=I
OL
= 24mA (MIN) at V
CC
=3V
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
a73 WIDE OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 5.5V
(1.2V Data Retention)
a73 LATCH-UP PERFORMANCE EXCEED
300mA
a73 RoHS FLIP-CHIP AND SOT PACKAGES
DESCRIPTION
The 74LX1G125 is a low voltage CMOS SINGLE
BUS BUFFER fabricated with sub-micron silicon
gate and double-layer metal wiring C
2
MOS
technology.
3-STATE control input G has to be set HIGH to
place the output into the high impedance state.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V or lower power supply
systems. The sub-micron CMOS technology used
allow ultra low power consumption and guarantee
optimized operations between 2.8V and 1.8V
system, as Smart Phone, Digital Still Camera,
PDA, Notebook, or each other battery powered
equipment.
All inputs and outputs are equipped with
protection circuits against ESD discharge.
74LX1G125
SINGLE BUS BUFFER (3-STATE)
PIN CONNECTION AND IEC LOGIC SYMBOLS (top view for SOT, top through view for Flip-Chip)
ORDER CODES
PACKAGE T & R
SOT23-5L 74LX1G125STR
SOT323-5L 74LX1G125CTR
Flip-Chip5 74LX1G125BJR
SOT323-5L
Flip-Chip5
(Max dim = 1.3x1.3mm)
SOT23-5L